Module

Voraussetzungen

Inhalte

Lecture (Theory) • Repetition of basics: sampling, quantization, noise, DFT, windowing, Z-transformation • Specification: operating modes, static and dynamic properties, test of DNL, INL, distortions • Nyquist rate AD and DA converters: architectural elements, resistive and capacitive dividers, R2R networks, mismatch, trimming, hybrid DACs, power source-based DACs, segmentation, flash converters, sub-ranking and folding techniques, SAR and pipeline ADCs, analog blocks such as regenerative comparators and clock generators • Oversampling AD and DA converters: 1st-order modulator, noise shaping, STF and NTF, higher-order NTF, SC integrator and SC circuit techniques, comparator and clock scheme, multi-bit quantizers, DEM, cascaded modulators, resonators, decimation filters, sinc filters, time-continuous modulator Seminar/Laboratory • Introduction Matlab / Simulink • Simulation techniques, spectral analyzes, DNL and INL • Modeling individual components of a Nyquist rate ADC • Sequence control with Simulink / Stateflow • Simulation of non-ideal components in NR-ADCs • Delta-Sigma Toolbox • Design of discrete-time modulators • Design of continuous-time modulators • Influence of non-ideal components • Evaluation of a specification

Lernziele

The students are familiar with the structure and application of Nyquist rate and oversampling AD and DA converters. They understand the specification, areas of application, advantages and disadvantages of the respective converter and can make an appropriate selection for an application. They can describe a Nyquist rate and delta sigma ADC in Matlab / Simulink and simulate the specification.

Prüfungsleistung

Two complex tasks are assigned in the laboratory, each contributing 30% to the overall grade. At the end of the lecture period a written test with a duration of 60 minutes takes place, which contributes 40% to the overall grade. • Task 1 in the lab: Nyquist rate ADC, approx. 5 pages incl. graphics plus the simulation files from Matlab (30%) • Task 2 in the lab: Delta Sigma ADC, approx. 5 pages incl. graphics plus the simulation files from Matlab (30%) • Written test, 60 minutes (40%)

Bemerkungen

• Study programme Micro- and Nanoelectronics M.Sc.: Compulsory elective module in complex „Circuit Design“ Students wishing to attend this module are kindly requested to get in touch with the module responsible at an early stage. Enrolment key for Moodle required.